The PHOENICS architecture is based on the hybrid integration approach of three different chip platforms:

optical input generation in silicon nitride

signal encoding and modulation in indium phosphide

neuromorphic processing and detection in silicon

PHOENICS architecture based on a hybrid integration of a micro comb chip, InP active modulation unit, complemented with photonics MVM processing unit

The chip module for generating the optical driving signals will be developed jointly by EPFL and MicroR Systems using chip-scale optical frequency combs operating in the soliton regime (soliton microcombs). The PHOENICS project will employ coherent frequency microcombs as the ultimate integrated sources aligned to the telecom ITU grid. This approach will enable the generation of spectrally precisely aligned wavelength channels in a compact format.

HHI will develop an InP (indium phosphide) module as the active modulation unit for encoding the input vectors for neuromorphic processing. This module will provide modulated and multiplexed input signals for matrix processing. The InP module will consist of high-speed electro-absorption modulators delivering up to 20 GHz modulation speed.

The optically encoded vectors will be processed by an ultrafast matrix-vector-multiplication (MVM) processor. The MVM chip will be realized using silicon photonics technology developed jointly by the Universities of Exeter, Oxford, and Ghent.

WWU, Nanoscribe GmbH & Co. KG, and IBM will design the system architecture and join the chip platforms.